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In this MagmaWire we feature several new solutions that will help designers get their jobs done faster, with better results AND lower costs.
Rajeev Madhavan – Chairman & CEO, Magma Design Automation
In the last issue of MagmaWire, I talked about the growth in mixed-signal systems on chip (SoCs) and the challenges this presents in terms of design productivity and chip performance. At our recent MUSIC conference in Silicon Valley I gave a talk on this topic titled “The Electronic Ocean” where I went into more detail on some of the new products that Magma has been developing for this rapidly growing market. I officially unveiled our new Tekton™ static timing analysis solution and a new, high-speed, high- capacity extraction tool, QCP™. In this article, I explain why Tekton and QCP represent the beginning of a new generation of STA and extraction technologies and describe how they were architected specifically to address the challenges of timing analysis and design closure at 40 nanometer (nm) and below. Read more >>
The combination of on-chip variation (OCV) at smaller process geometries and the increasing use of multiple voltage domains and different chip operating modes in today’s ICs has led to an explosion in the number of operating corners or “scenarios” that must be analyzed. To address this, design teams have adopted a simple, but expensive, approach: for every additional timing scenario that must be considered, secure a separate machine and STA license to run that scenario. In this article for Electronic Design, “Oh, The Pain (Of Timing Closure At 28 nm),” Magma’s Dan Blong explains why, for advanced ICs that require hundreds of scenarios to be analyzed, this approach will be too costly and will not work. Magma recently announced Tekton, a revolutionary timing analysis platform that can analyze 10-million-cell designs in minutes on a single CPU – without sacrificing accuracy. Magma also announced QCP, a next-generation standalone extraction tool and integral part of the Tekton platform. QCP provides the performance boost and accuracy required for designs at 40 nm and below and eliminates the extraction bottleneck in timing closure. To learn more about how Tekton can help you meet tight design schedules and minimize hardware costs, download the “Tekton: Next-Generation Timing Analysis Platform”white paper>>
The world of chip design is brutal. You have to build larger, more complex chips with fewer resources and in less time. The faster you can identify problems or determine which approach is best, the faster you can reach your design goals.Talus® Vortex 1.1 includes the new Talus® Visual Volcano™, this visual analysis environment integrates and presents all design and analysis data via a common display, allowing you to make better design decisions faster. In the “Solving Design Challenges Visually with the Talus Visual Volcano” webinar, you’ll learn how you can accelerate design debugging and improve communication between team members. In this 10 minute webinar, you’ll see how the Talus Visual Volcano allows you to:
View the webinar >>
No, Chevrolet hasn’t reintroduced an old car, but Magma’s new FineSim™ Fast Monte Carlo revolutionizes traditional analysis. FineSim Fast Monte Carlo makes it possible to achieve much more accurate statistical analysis as much as 100 times faster than traditional Monte Carlo methods. Read more >>
Magma kicked off its series of MUSIC (Magma User Summit on Integrated Circuits) conferences. MUSIC Silicon Valley was held March 10 in San Jose. The program featured 12 user papers, two tutorials, a lunch panel and two keynotes. The top paper award went to Anand Raman of Helic Inc. for his paper titled "A High-Capacity Power Integrity Flow Supporting Inductive Rail Effects with Transistor-Level Accuracy." The second place award went to Siobhan Barry of QThink for her paper titled "Comparing Crosstalk Delay Calculations in Talus® and PrimeTime-SI." Third place went to Lyle Smith of Actel Corporation for "Using the Titan™ Shape-Based-Router for Actel's Next-Generation Flash-based FPGA Product Family." Magma users can view the papers and presentations by logging on to Magma’s online support environment, MOLTEN® >> In the CEO keynote “The Electronic Ocean”, Rajeev Madhavan predicted a tidal wave of demand for mixed-signal chips. Madhavan explained how Magma's unique ability to integrate analog and digital design has transformed the company into the leading provider of mixed-signal system-on-chip (SoC) solutions. After his keynote, he talked with Lou Covey of New Tech Press about Tekton and other new products. View the video interview >> The guest keynote titled “Integrated Circuits: 3D New Directions for Semiconductors,” was given by Robert Patti, CTO and vice president of Design Engineering of Tezzaron Semiconductor. He described current 3D technologies, how they’re implemented and the design challenges they present. He described 3D assembly methods, wafer-to-wafer and die-to-wafer 3D assembly tradeoffs, 3D as an alternative to embedding memories and the availability of EDA tools for 3D today and emerging requirements. As reported in ESNUG, Tezzaron switched from Mentor Calibre to Magma Quartz™ DRC and Quartz LVS. The company cited the need for a physical verification solution that scales efficiently across a larger number of CPUs and machines, supports Tcl and is compatible with Calibre as key reasons for the decision to switch. Read more >>
Talus Vortex 1.1 and Hydra 1.1 Available Now Magma Training offers a range of training workshops to help you maximize your investment in Magma software. Our courses range from introductory level to advanced design methodology including hands-on labs to enhance your understanding of key concepts. Courses cover all aspects of high-level design. New sessions include:
Magma has training centers in the USA and Japan. For more information or to enroll, visit www.MagmaTraining.com >> MOLTEN MOLTEN is an online support environment for Magma users. Recent MOLTEN enhancements make it even easier to use, including:
For more information or to request a MOLTEN account visit: www.magma-da.com/support >>
Rajeev Madhavan, Chairman & CEO of Magma Design AutomationIn the last issue of MagmaWire, I talked about the growth in mixed-signal systems on chip (SoCs) and the challenges this presents in terms of design productivity and chip performance. At our recent MUSIC conference in Silicon Valley I gave a talk on this topic titled “The Electronic Ocean” where I went into more detail on some of the new products that Magma has been developing for this rapidly growing market. I’d like to share some of these new product developments with you now. If you saw the Winter 2009 issue of MagmaWire, you may have noticed my comment about forthcoming new static timing analysis (STA) and extraction technologies. I’m pleased to say that at MUSIC we officially unveiled our new Tekton STA solution and a new, high-speed / high capacity extraction tool, QCP. Tekton and QCP represent the beginning of a new generation of STA and extraction technologies that were architected specifically to address the challenges of timing analysis and design closure at 40 nanometer (nm) and below. We developed Tekton in response to a recurring set of issues that we heard from our customers. These included issues with runtime, capacity and accuracy. The primary causes of the issues with the current generation of timing analysis tools lie in the increased complexity of today’s SoC designs and the tremendous growth in the number of timing scenarios (multi-mode/multi-corner) that must be analyzed. Prior to Tekton, our customers were forced to deal with these issues by developing work-around solutions – none of which were very palatable. For example, to solve the growing number of timing scenarios, some customers opted to purchase additional expensive servers and STA software licenses so that they could have a dedicated machine to run each scenario. Other customers made the decision not to analyze all scenarios, but to focus on just a few in an attempt to manage their schedules – knowing that accuracy would suffer. Tekton changes the game entirely. It was designed from the ground up to quickly run very large designs on a single machine and to address the exploding number of analysis scenarios. The following diagram illustrates the power of Tekton – the next generation of timing analysis.
Our new extractor, QCP, was designed to be tightly integrated with Tekton. QCP delivers a 10x performance increase over existing extractors and is able to extract a 50-million-instance designs and process 4 million nets per hour on standard hardware. QCP is based on the industry standard QuickCap for accuracy and is fully multi-threaded for near-linear performance increase on up to 16 CPUs. QCP really shines when used with Tekton during timing closure and engineering change order (ECO) cycles. Running in the same session with Tekton, QCP supports fast what-if analysis by providing rapid extraction feedback to Tekton on proposed netlist changes.
At MUSIC we also announced our new FineSim Fast Monte Carlo product. It is a revolutionary new alternative to traditional Monte Carlo analysis that makes it possible to achieve much more accurate statistical analysis in a fraction of the time for traditional methods. As customers continue to push their products into more advanced process technologies, the need for improved reliability becomes even more critical. However because of the increasing number of process parameters and parasitic variability, accurate statistical yield analysis, reliability and failure analysis has become virtually impossible to predict. FineSim Fast Monte Carlo uses proprietary dynamic error controlled algorithms along with sophisticated statistical techniques to provide dramatic speedup and accuracy in traditional Monte Carlo statistical analysis. It has shown as much as 100 times faster runtime when the results were compared to other commercial methods – with better accuracy.
We are continuing to work on other exciting new technologies to address the growing need for mixed-signal SoC design solutions. Stay tuned … we look forward to seeing you at the Design Automation Conference in Anaheim, CA in June.